The present invention relates generally to the field of transistors, and more particularly to the reduction of parasitic capacitance and resistance in finFET devices.
With the increasing down scaling of integrated circuits and increasingly higher requirements for the number of transistors present in integrated circuits, transistors need to have higher drive currents with increasingly smaller dimensions. In its basic form, a finFET device includes a source, a drain and one or more fin-shaped channels between the source and the drain. A gate electrode over the fin(s) regulates electron flow between the source and the drain. In general, finFET devices facilitate manufacturing smaller and smaller transistors, but have higher parasitic capacitance and resistance than other transistor designs.